potter: back to N power HAL
Change-Id: Ibaf21913ba08750d69479b07a5b31bb31fdb7418
This commit is contained in:
122
power/performance.h
Normal file → Executable file
122
power/performance.h
Normal file → Executable file
@@ -35,17 +35,14 @@ extern "C" {
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#define SUCCESS 0
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#define INDEFINITE_DURATION 0
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/* Hints sent to perf HAL from power HAL
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* These have to be kept in sync with Perf HAL side definitions
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*/
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#define VENDOR_HINT_DISPLAY_OFF 0x00001086
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#define VENDOR_HINT_DISPLAY_ON 0x00001087
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enum SCREEN_DISPLAY_TYPE {
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DISPLAY_OFF = 0x00FF,
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};
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enum PWR_CLSP_TYPE {
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#ifdef MPCTLV3
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ALL_CPUS_PWR_CLPS_DIS_V3 = 0x40400000, /* v3 resource */
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#endif
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ALL_CPUS_PWR_CLPS_DIS = 0x101,
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};
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@@ -103,6 +100,10 @@ enum CPU3_MAX_FREQ_LVL {
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};
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enum MIN_CPUS_ONLINE_LVL {
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#ifdef MPCTLV3
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CPUS_ONLINE_MIN_BIG = 0x41000000, /* v3 resource */
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CPUS_ONLINE_MIN_LITTLE = 0x41000100, /* v3 resource */
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#endif
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CPUS_ONLINE_MIN_2 = 0x702,
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CPUS_ONLINE_MIN_3 = 0x703,
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CPUS_ONLINE_MIN_4 = 0x704,
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@@ -111,6 +112,10 @@ enum MIN_CPUS_ONLINE_LVL {
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};
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enum MAX_CPUS_ONLINE_LVL {
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#ifdef MPCTLV3
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CPUS_ONLINE_MAX_LIMIT_BIG = 0x41004000, /* v3 resource */
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CPUS_ONLINE_MAX_LIMIT_LITTLE = 0x41004100, /* v3 resource */
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#endif
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CPUS_ONLINE_MAX_LIMIT_1 = 0x8FE,
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CPUS_ONLINE_MAX_LIMIT_2 = 0x8FD,
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CPUS_ONLINE_MAX_LIMIT_3 = 0x8FC,
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@@ -134,6 +139,7 @@ enum ONDEMAND_SAMPLING_DOWN_FACTOR_LVL {
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SAMPLING_DOWN_FACTOR_4 = 0xD04,
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};
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enum INTERACTIVE_TIMER_RATE_LVL {
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TR_MS_500 = 0xECD,
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TR_MS_100 = 0xEF5,
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@@ -162,28 +168,9 @@ enum INTERACTIVE_TIMER_RATE_LVL_CPU4_8939 {
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TR_MS_CPU4_20 = 0x3BFD,
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};
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/* This timer rate applicable to big.little arch */
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enum INTERACTIVE_TIMER_RATE_LVL_BIG_LITTLE {
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BIG_LITTLE_TR_MS_100 = 0x64,
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BIG_LITTLE_TR_MS_50 = 0x32,
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BIG_LITTLE_TR_MS_40 = 0x28,
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BIG_LITTLE_TR_MS_30 = 0x1E,
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BIG_LITTLE_TR_MS_20 = 0x14,
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};
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/* INTERACTIVE opcodes */
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enum INTERACTIVE_OPCODES {
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INT_OP_CLUSTER0_TIMER_RATE = 0x41424000,
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INT_OP_CLUSTER1_TIMER_RATE = 0x41424100,
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INT_OP_CLUSTER0_USE_SCHED_LOAD = 0x41430000,
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INT_OP_CLUSTER1_USE_SCHED_LOAD = 0x41430100,
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INT_OP_CLUSTER0_USE_MIGRATION_NOTIF = 0x41434000,
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INT_OP_CLUSTER1_USE_MIGRATION_NOTIF = 0x41434100,
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INT_OP_NOTIFY_ON_MIGRATE = 0x4241C000
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};
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enum INTERACTIVE_HISPEED_FREQ_LVL {
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HS_FREQ_1026 = 0xF0A,
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HS_FREQ_800 = 0xF08,
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};
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enum INTERACTIVE_HISPEED_LOAD_LVL {
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@@ -213,6 +200,9 @@ enum SCREEN_PWR_CLPS_LVL {
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enum THREAD_MIGRATION_LVL {
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THREAD_MIGRATION_SYNC_OFF = 0x1400,
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#ifdef MPCTLV3
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THREAD_MIGRATION_SYNC_ON_V3 = 0x4241C000
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#endif
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};
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enum INTERACTIVE_IO_BUSY_LVL {
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@@ -221,6 +211,9 @@ enum INTERACTIVE_IO_BUSY_LVL {
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};
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enum SCHED_BOOST_LVL {
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#ifdef MPCTLV3
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SCHED_BOOST_ON_V3 = 0x40C00000, /* v3 resource */
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#endif
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SCHED_BOOST_ON = 0x1E01,
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};
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@@ -260,6 +253,83 @@ enum CPU7_MAX_FREQ_LVL {
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CPU7_MAX_FREQ_NONTURBO_MAX = 0x260A,
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};
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enum SCHED_PREFER_IDLE {
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#ifdef MPCTLV3
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SCHED_PREFER_IDLE_DIS_V3 = 0x40C04000,
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#endif
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SCHED_PREFER_IDLE_DIS = 0x3E01,
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};
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enum SCHED_MIGRATE_COST_CHNG {
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SCHED_MIGRATE_COST_SET = 0x3F01,
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};
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#ifdef MPCTLV3
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/**
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* MPCTL v3 opcodes
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*/
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enum MAX_FREQ_CLUSTER_BIG {
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MAX_FREQ_BIG_CORE_0 = 0x40804000,
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};
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enum MAX_FREQ_CLUSTER_LITTLE {
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MAX_FREQ_LITTLE_CORE_0 = 0x40804100,
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};
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enum MIN_FREQ_CLUSTER_BIG {
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MIN_FREQ_BIG_CORE_0 = 0x40800000,
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};
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enum MIN_FREQ_CLUSTER_LITTLE {
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MIN_FREQ_LITTLE_CORE_0 = 0x40800100,
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};
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enum INTERACTIVE_CLUSTER_BIG {
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ABOVE_HISPEED_DELAY_BIG = 0x41400000,
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GO_HISPEED_LOAD_BIG = 0x41410000,
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HISPEED_FREQ_BIG = 0x41414000,
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TARGET_LOADS_BIG = 0x41420000,
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TIMER_RATE_BIG = 0x41424000,
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USE_SCHED_LOAD_BIG = 0x41430000,
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USE_MIGRATION_NOTIF_BIG = 0x41434000,
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IGNORE_HISPEED_NOTIF_BIG = 0x41438000,
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};
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enum INTERACTIVE_CLUSTER_LITTLE {
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ABOVE_HISPEED_DELAY_LITTLE = 0x41400100,
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GO_HISPEED_LOAD_LITTLE = 0x41410100,
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HISPEED_FREQ_LITTLE = 0x41414100,
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TARGET_LOADS_LITTLE = 0x41420100,
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TIMER_RATE_LITTLE = 0x41424100,
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USE_SCHED_LOAD_LITTLE = 0x41430100,
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USE_MIGRATION_NOTIF_LITTLE = 0x41434100,
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IGNORE_HISPEED_NOTIF_LITTLE = 0x41438100,
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};
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enum CPUBW_HWMON {
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CPUBW_HWMON_MIN_FREQ = 0x41800000,
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CPUBW_HWMON_V1 = 0x4180C000,
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LOW_POWER_CEIL_MBPS = 0x41810000,
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LOW_POWER_IO_PERCENT = 0x41814000,
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CPUBW_HWMON_SAMPLE_MS = 0x41820000,
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};
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enum SCHEDULER {
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SCHED_SMALL_TASK_DIS = 0x40C0C000,
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SCHED_IDLE_LOAD_DIS = 0x40C10000,
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SCHED_IDLE_NR_RUN_DIS = 0x40C14000,
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SCHED_GROUP_ON = 0x40C28000,
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};
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enum STORAGE {
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STOR_CLK_SCALE_DIS = 0x42C10000,
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};
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enum GPU {
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GPU_MIN_PWRLVL_BOOST = 0x42804000,
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};
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#endif
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#ifdef __cplusplus
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}
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#endif
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